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查看PWM对应扩展板的引脚

100ask_imx6ul通过扩展板插槽来验证pwm波，所以这里通过扩展板的原理图及芯片手册可知，gpio4_io20，gpio4_io19分别对应着PWM8和PWM7。

 

 

 设置设备树

打开官方NXP的工具i.MX pins v6工具，PWM7/PWM8的配置如下：

 

 

 然后把上图中增加的代码复制到设备树100ask_imx6ull-14x14.dts下的iomuxc中：

 

		pinctrl_pwm7: pwm7grp{                fsl,pins = <MX6UL_PAD_CSI_VSYNC__PWM7_OUT   0x000010B0>;};pinctrl_pwm8: pwm8grp{                fsl,pins = <MX6UL_PAD_CSI_HSYNC__PWM8_OUT   0x000010B0>;};

 再在100ask_imx6ull-14x14.dts添加对pwm7/pwm8设置：

 

&pwm7 {pinctrl-names = "default";pinctrl-0 = <&pinctrl_pwm7>;status = "okay";
};
&pwm8 {pinctrl-names = "default";pinctrl-0 = <&pinctrl_pwm8>;status = "okay";
};

 然后在imx6ull.dtsi中修改pwm7/pwm8:

			pwm7: pwm@020f8000 {compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";reg = <0x020f8000 0x4000>;interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;clocks = <&clks IMX6UL_CLK_PWM7>,<&clks IMX6UL_CLK_PWM7>;clock-names = "ipg", "per";#pwm-cells = <2>;};pwm8: pwm@020fc000 {compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";reg = <0x020fc000 0x4000>;interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;clocks = <&clks IMX6UL_CLK_PWM8>,<&clks IMX6UL_CLK_PWM8>;clock-names = "ipg", "per";#pwm-cells = <2>;};

这里面clocks中pwm7/pwm8的值默认都是 IMX6UL_CLK_DUMMY，需要设置成IMX6UL_CLK_PWM8和IMX6UL_CLK_PWM8。

最后

make dtbs

重新烧入新编译的dtb文件。

测试pwm

如图，imx6ull有8路pwm，其中PWM7对应 pwmchip6，PWM8对应pwmchip7。

对pwmchip6进行设置如下：

/*  /sys/class/pwm/pwmchip6  */
echo 0 > exportecho 5000 > pwm0/periodecho 3000 > pwm0/duty_cycleecho 1 > pwm0/enable

对pwmchip7的设置也是类似，不过在测试过程中发现pwmchip6能够正常输出pwm波，但是pwmchip7没有反应(这个问题暂时没有去考虑)